MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1104

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Functional Description
The DSPI supports four different transfer formats:
A modified transfer format is supported to allow for high-speed communication with
peripherals that require longer setup times. The DSPI can sample the incoming data later
than halfway through the cycle to give the peripheral more setup time. The MTFE bit in
the MCR selects between Classic SPI Format and Modified Transfer Format.
In the SPI Configurations, the DSPI provides the option of keeping the PCS signals
asserted between frames. See
42.4.4.1 Classic SPI Transfer Format (CPHA = 0)
The transfer format shown in following figure is used to communicate with peripheral
SPI slave devices where the first data bit is available on the first clock edge. In this
format, the master and slave sample their SIN pins on the odd-numbered SCK edges and
change the data on their SOUT pins on the even-numbered SCK edges.
1104
• Classic SPI with CPHA=0
• Classic SPI with CPHA=1
• Modified Transfer format with CPHA = 0
• Modified Transfer format with CPHA = 1
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Continuous Selection Format
for details.
Freescale Semiconductor, Inc.

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