MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1444

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Memory map and register definition
48.6.3 Pin enable register (TSIx_PEN)
Addresses: TSI0_PEN is 4004_5000h base + 8h offset = 4004_5008h
1444
Bit
W
R
AMCLKDIV
Reserved
AMCLKS
31
0
AMPSC
31–20
19–16
LPSP
Field
Field
4–3
2–0
30
5
0
29
0
28
0
Do not change PEN when GENCS[TSIEN] is set.
All PEN bits can be read at any time, but must not be written
while GENCS[SCNIP] is set.
Active mode clock divider
0
1
Active mode clock source
00
01
10
11
Active mode prescaler
000
001
010
011
100
101
110
111
This read-only field is reserved and always has the value zero.
Low-power scan pin
27
0
Divider set to 1
Divider set to 2048
26
0
Bus Clock
MCGIRCLK
OSCERCLK
Not valid
Input clock source divided by 1
Input clock source divided by 2
Input clock source divided by 4
Input clock source divided by 8
Input clock source divided by 16
Input clock source divided by 32
Input clock source divided by 64
Input clock source divided by 128
0
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
TSIx_SCANC field descriptions (continued)
23
0
22
0
21
TSIx_PEN field descriptions
0
Table continues on the next page...
20
0
19
0
18
LPSP
0
NOTE
NOTE
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
4
0
0
3
0
2
0
1
0
0