MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 269

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
OUTDIV2
OUTDIV4
Reserved
27–24
23–20
19–16
Field
1110
1111
Clock 2 output divider value
This field sets the divide value for the peripheral clock. At the end of reset, it is loaded with either 0000 or
0111 depending on FTFL_FOPT[LPBOOT].
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
This read-only field is reserved and always has the value zero.
Clock 4 output divider value
This field sets the divide value for the flash clock. At the end of reset, it is loaded with either 0001 or 1111
depending on FTFL_FOPT[LPBOOT].
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Divide-by-15.
Divide-by-16.
Divide-by-1.
Divide-by-2.
Divide-by-3.
Divide-by-4.
Divide-by-5.
Divide-by-6.
Divide-by-7.
Divide-by-8.
Divide-by-9.
Divide-by-10.
Divide-by-11.
Divide-by-12.
Divide-by-13.
Divide-by-14.
Divide-by-15.
Divide-by-16.
Divide-by-1.
Divide-by-2.
Divide-by-3.
Divide-by-4.
Divide-by-5.
Divide-by-6.
Divide-by-7.
Divide-by-8.
Divide-by-9.
Divide-by-10.
Divide-by-11.
Divide-by-12.
Divide-by-13.
Divide-by-14.
Divide-by-15.
Divide-by-16.
SIM_CLKDIV1 field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table continues on the next page...
Description
Chapter 12 System integration module (SIM)
269