MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 872

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Functional Description
loading point. If the trigger event was a hardware trigger then the trigger enable bit
(TRIGn) is cleared according to
Hardware
Trigger. Examples with software and
hardware triggers follow.
system clock
write 1 to SWSYNC bit
SWSYNC bit
software trigger event
selected loading point
MOD register is updated
Figure 36-209. MOD Synchronization with (SYNCMODE = 0), (PWMSYNC = 0), (REINIT =
0), and (Software Trigger Was Used)
system clock
write 1 to TRIG0 bit
TRIG0 bit
trigger 0 event
selected loading point
MOD register is updated
Figure 36-210. MOD Synchronization with (SYNCMODE = 0), (HWTRIGMODE = 0),
(PWMSYNC = 0), (REINIT = 0), and (a Hardware Trigger Was Used)
If (SYNCMODE = 0), (PWMSYNC = 0) and (REINIT = 1) then this synchronization is
made on the next enabled trigger event. If the trigger event was a software trigger then
the SWSYNC bit is cleared according to the following example. If the trigger event was a
hardware trigger then the TRIGn bit is cleared according to
Hardware
Trigger. Examples
with software and hardware triggers follow.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
872
Freescale Semiconductor, Inc.