MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 726

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
CMP Functional Description
32.8.1 CMP Functional Modes
There are three main sub-blocks to the comparator module: the comparator itself, the
window function and the filter function. The filter, CR0[FILTER_CNT] can be clocked
from an internally or external clock source. Additionally, the filter is programmable with
respect to how many samples must agree before a change on the output is registered. In
the simplest case, only 1 sample must agree. In this case, the filter acts as a simple
sampler.
The external sample input is enabled using CR1[SE]. When set, the output of the
comparator is sampled only on rising edges of the sample input.
The "windowing mode" is enabled by setting CR1[WE]. When set, the comparator output
is sampled only when the WINDOW input signal is equal to one. This feature can be
used to ignore the comparator output during time periods in which the input voltages are
not valid. This is especially useful when implementing zero-crossing-detection for certain
PWM applications.
The comparator filter and sampling features can be combined as shown in the following
table. Individual modes are discussed below.
726
Mode #
2A
2B
3A
3B
4A
4B
5A
5B
1
CR1[EN]
0
1
1
1
1
1
1
1
1
CR1[WE]
Table 32-29. Comparator Sample/Filter Controls
X
0
0
0
0
0
0
1
1
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
CR1[SE]
X
0
0
1
0
1
0
0
0
Table continues on the next page...
CR0[FILTER_C
> 0x01
> 0x01
0x00
0x01
0x01
0x00
NT]
X
X
X
FPR[FILT_PER]
> 0x00
> 0x00
0x00
0x00
X
X
X
X
X
Refer to the
Refer to the
Refer to the
Comparator output is sampled on
every rising bus clock edge when
Refer to the
SAMPLE=1 to generate COUTA
Sampled, Non-Filtered mode
Refer to the
Sampled, Filtered mode
Freescale Semiconductor, Inc.
Mode (#s 3A &
Mode (#s 4A &
Continuous Mode
Windowed mode
Operation
Sampled, Non-Filtered
2A &
5A &
Disabled
Continuous Mode (#s
Disabled Mode (#
Windowed Mode (#s
Sampled, Filtered
2B).
5B).
3B).
4B).
1).

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