MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 103

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

3.7.1.1 ADC instantiation information
This device contains two ADCs. Each ADC contains a PGA channel for a total of two
separate PGAs.
3.7.1.1.1 Number of ADC channels
The number of ADC channels present on the device is determined by the pinout of the
specific device package. For details regarding the number of ADC channel available on a
particular package, refer to the signal multiplexing chapter of this MCU.
3.7.1.2 DMA Support on ADC
Applications may require continuous sampling of the ADC (4K samples/sec) that may
have considerable load on the CPU. Though using PDB to trigger ADC may reduce some
CPU load, The ADC supports DMA request functionality for higher performance when
the ADC is sampled at a very high rate or cases were PDB is bypassed. The ADC can
trigger the DMA (via DMA req) on conversion completion.
Freescale Semiconductor, Inc.
System memory map
Power management
Signal multiplexing
Full description
Clocking
Topic
Figure 3-31. 16-bit SAR ADC with PGA configuration
Other peripherals
Table 3-43. Reference links to related information
16-bit SAR ADC with
Related module
Port control
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
PGA
Transfers
16-bit SAR ADC
Peripheral bus
controller 0
Register
access
16-bit SAR ADC with PGA
System memory map
Power management
Signal multiplexing
Clock distribution
Module signals
Reference
Chapter 3 Chip Configuration
103