MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 447

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
MK30DN512ZVLK10
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21.3.25 TCD Signed Destination Address Offset (DMA_TCD_DOFF)
Addresses: 4000_8000h base + 1014h offset + (32d × n), where n = 0d to 15d
* Notes:
21.3.26 TCD Current Minor Loop Link, Major Loop Count (Channel
If TCDn_CITER[ELINK] is set, the TCDn_CITER register is defined as follows.
Addresses: 4000_8000h base + 1016h offset + (32d × n), where n = 0d to 15d
* Notes:
Freescale Semiconductor, Inc.
Reset
Reset
Read
Read
Write
Write
x = Undefined at reset.
x = Undefined at reset.
Bit
Bit
DADDR
DOFF
31–0
15–0
Field
Field
15
x*
15
x*
Linking Enabled) (DMA_TCD_CITER_ELINKYES)
14
x*
14
x*
Destination Address
Memory address pointing to the destination data.
Destination Address Signed offset
Sign-extended offset applied to the current destination address to form the next-state value as each
destination write is completed.
0
13
x*
13
x*
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
12
x*
12
x*
DMA_TCDn_DADDR field descriptions
DMA_TCDn_DOFF field descriptions
11
x*
11
x*
LINKCH
10
x*
10
x*
x*
x*
9
9
x*
x*
8
8
DOFF
Description
Description
x*
x*
Chapter 21 Direct Memory Access Controller (eDMA)
7
7
x*
x*
6
6
x*
x*
5
5
CITER
x*
x*
4
4
x*
x*
3
3
x*
x*
2
2
x*
x*
1
1
x*
x*
0
0
447

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