MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 917

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

When the FTM exits from reset:
The following figure shows the FTM behavior after the reset. At the reset (item 1), the
FTM counter is disabled (see the description of the
register), its value is updated to zero and the pins are not controlled by FTM ().
After the reset, the FTM should be configurated (item 2). It is necessary to define the
FTM counter mode, the FTM counting limits (MOD and CNTIN registers value), the
channels mode and CnV registers value according to the channels mode.
Thus, it is recommended to write any value to CNT register (item 3). This write updates
the FTM counter with the CNTIN register value and the channels output with its initial
value (except for channels in output compare mode)
The next step is to select the FTM counter clock by the CLKS[1:0] bits (item 4). It is
important to highlight that the pins are only controlled by FTM when CLKS[1:0] bits are
different from zero ().
Freescale Semiconductor, Inc.
channel (n) output
• the FTM counter and the prescaler counter are zero and are stopped (CLKS[1:0] =
• the timer overflow interrupt is zero
• the channels interrupts are zero
• the fault interrupt is zero
• the channels are in input capture mode
• the channels outputs are zero;
• the channels pins are not controlled by FTM (ELS(n)B:ELS(n)A = 0:0) ().
Figure 36-259. FTM Behavior After Reset When the Channel (n) Is in Combine Mode
FTM counter
00b);
CLKS[1:0]
NOTES:
(1) FTM reset
XXXX
– CNTIN = 0x0010
– Channel (n) is in low-true combine mode with CNTIN < C(n)V < C(n+1)V < MOD
– C(n)V = 0x0015
XX
(2) FTM configuration
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
(3) write any value
0x0000
to CNT register
00
(Fault
(Channel (n)
Interrupt);
(Timer Overflow
0x0010
(4) write 1 to SC[CLKS]
(Input Capture
0x0011
Interrupt);
CLKS
(Counter
0x0012
channel (n) pin is controlled by FTM
01
Interrupt);
0x0013
field in the Status and Control
Mode);
Reset).
0x0014
0x0015
Chapter 36 FlexTimer (FTM)
0x0016
0x0017
0x0018
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