MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 143

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Chapter 4
Memory Map
4.1 Introduction
This device contains various memories and memory-mapped peripherals which are
located in one 32-bit contiguous memory space. This chapter describes the memory and
peripheral locations within that memory space.
4.2 System memory map
The following table shows the high-level device memory map.
Freescale Semiconductor, Inc.
0x0000_0000–0x0FFF_FFFF
0x1000_0000–0x13FF_FFFF
0x1400_0000–0x17FF_FFFF
0x1800_0000–0x1FFF_FFFF
0x2000_0000–0x200F_FFFF
0x2010_0000–0x21FF_FFFF
0x2200_0000–0x23FF_FFFF
0x2400_0000–0x3FFF_FFFF
0x4000_0000–0x4007_FFFF
0x4008_0000–0x400F_EFFF
0x400F_F000–0x400F_FFFF
System 32-bit Address Range
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table 4-1. System memory map
Program flash and read-only data
(Includes exception vectors in first 1024 bytes)
Programming acceleration RAM
SRAM_L: Lower SRAM (ICODE/DCODE)
SRAM_U: Upper SRAM bitband region
Reserved
Aliased to SRAM_U bitband
Reserved
Bitband region for peripheral bridge 0 (AIPS-Lite0)
Bitband region for peripheral bridge 1 (AIPS-Lite1)
Bitband region for general purpose input/output (GPIO)
Table continues on the next page...
• Reserved
Destination Slave
All masters
All masters
All masters
All masters
All masters
–
Cortex-M4 core
only
–
Cortex-M4 core &
DMA/EzPort
Cortex-M4 core &
DMA/EzPort
Cortex-M4 core &
DMA/EzPort
Access
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