MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 38

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Section Number
42.2
42.3
42.4
38
42.1.3
42.1.4
DSPI Signal Descriptions.............................................................................................................................................1072
42.2.1
42.2.2
42.2.3
42.2.4
42.2.5
42.2.6
42.2.7
Memory Map/Register Definition.................................................................................................................................1074
42.3.1
42.3.2
42.3.3
42.3.4
42.3.5
42.3.6
42.3.7
42.3.8
42.3.9
42.3.10
42.3.11
Functional Description..................................................................................................................................................1094
42.4.1
42.4.2
42.4.3
42.4.4
42.4.5
42.4.6
DSPI Configurations....................................................................................................................................1069
Modes of Operation.....................................................................................................................................1070
PCS0/SS — Peripheral Chip Select/Slave Select........................................................................................1072
PCS1 - PCS3 — Peripheral Chip Selects 1 - 3............................................................................................1072
PCS4 — Peripheral Chip Select 4................................................................................................................1073
PCS5/PCSS — Peripheral Chip Select 5/Peripheral Chip Select Strobe.....................................................1073
SIN — Serial Input......................................................................................................................................1073
SOUT — Serial Output................................................................................................................................1073
SCK — Serial Clock....................................................................................................................................1073
DSPI Module Configuration Register (SPIx_MCR)....................................................................................1076
DSPI Transfer Count Register (SPIx_TCR)................................................................................................1079
DSPI Clock and Transfer Attributes Register (In Master Mode) (SPIx_CTARn)......................................1079
DSPI Clock and Transfer Attributes Register (In Slave Mode) (SPIx_CTARn_SLAVE)..........................1084
DSPI Status Register (SPIx_SR)..................................................................................................................1085
DSPI DMA/Interrupt Request Select and Enable Register (SPIx_RSER)..................................................1088
DSPI PUSH TX FIFO Register In Master Mode (SPIx_PUSHR)...............................................................1090
DSPI PUSH TX FIFO Register In Slave Mode (SPIx_PUSHR_SLAVE)..................................................1091
DSPI POP RX FIFO Register (SPIx_POPR)...............................................................................................1092
DSPI Transmit FIFO Registers (SPIx_TXFRn)...........................................................................................1093
DSPI Receive FIFO Registers (SPIx_RXFRn)............................................................................................1094
Start and Stop of DSPI Transfers.................................................................................................................1095
Serial Peripheral Interface (SPI) Configuration...........................................................................................1096
DSPI Baud Rate and Clock Delay Generation.............................................................................................1100
Transfer Formats..........................................................................................................................................1103
Continuous Serial Communications Clock..................................................................................................1108
Slave Mode Operation Constraints..............................................................................................................1110
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Title
Freescale Semiconductor, Inc.
Page

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