MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 336

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Reset
Memory Map / Register Definition
Addresses: AXBS_PRS0 is 4000_4000h base + 0h offset = 4000_4000h
336
Bit
W
R
Reserved
Reserved
Reserved
31
0
0
30–28
26–24
Field
M7
M6
31
27
23
30
1
M7
AXBS_PRS1 is 4000_4000h base + 100h offset = 4000_4100h
AXBS_PRS2 is 4000_4000h base + 200h offset = 4000_4200h
AXBS_PRS3 is 4000_4000h base + 300h offset = 4000_4300h
AXBS_PRS4 is 4000_4000h base + 400h offset = 4000_4400h
AXBS_PRS5 is 4000_4000h base + 500h offset = 4000_4500h
AXBS_PRS6 is 4000_4000h base + 600h offset = 4000_4600h
AXBS_PRS7 is 4000_4000h base + 700h offset = 4000_4700h
29
1
28
1
This read-only field is reserved and always has the value zero.
Master 7 priority. Sets the arbitration priority for this port on the associated slave port.
000
001
010
011
100
101
110
111
This read-only field is reserved and always has the value zero.
Master 6 priority. Sets the arbitration priority for this port on the associated slave port.
000
001
010
011
100
101
110
111
This read-only field is reserved and always has the value zero.
27
0
0
• If the device contains less than five masters, values 000–
• If the device contains n masters where n ≥ 5, values 0 to n-1
26
011 are valid and writing other values results in an error.
are valid and writing other values results in an error.
1
This master has level 1, or highest, priority when accessing the slave port.
This master has level 2 priority when accessing the slave port.
This master has level 3 priority when accessing the slave port.
This master has level 4 priority when accessing the slave port.
This master has level 5 priority when accessing the slave port.
This master has level 6 priority when accessing the slave port.
This master has level 7 priority when accessing the slave port.
This master has level 8, or lowest, priority when accessing the slave port.
This master has level 1, or highest, priority when accessing the slave port.
This master has level 2 priority when accessing the slave port.
This master has level 3 priority when accessing the slave port.
This master has level 4 priority when accessing the slave port.
This master has level 5 priority when accessing the slave port.
This master has level 6 priority when accessing the slave port.
This master has level 7 priority when accessing the slave port.
This master has level 8, or lowest, priority when accessing the slave port.
M6
25
1
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
0
22
1
AXBS_PRSn field descriptions
M5
21
0
Table continues on the next page...
20
1
19
0
0
18
1
M4
17
0
16
0
15
0
0
Description
14
0
M3
13
1
12
1
11
0
0
10
0
M2
1
9
0
8
Freescale Semiconductor, Inc.
0
0
7
0
6
M1
0
5
4
1
0
0
3
0
2
M0
0
1
0
0

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