MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1151

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
from Data reg
Dummy read
Switch to
Rx mode
Y
Notes:
1. If general call is enabled, check to determine if the received address is a general call address (0x00).
2. When 10-bit addressing addresses a slave, the slave sees an interrupt following the first byte of the extended address.
If the received address is a general call address, the general call must be handled by user software.
Ensure that for this interrupt, the contents of the Data register are ignored and not treated as a valid data transfer.
byte to Data reg
transmitted?
address cycle
(master Rx)?
Write next
RXAK=0?
Last byte
End of
Y
N
N
Tx
signal (MST=0)
Generate stop
N
Y
Tx/Rx?
Set TXACK
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Figure 43-42. Typical I2C Interrupt Routine
Y
Rx
Read data from
last byte to be
to be read?
Last byte
and store
Data reg
2nd to
read?
N
N
signal (MST=0)
Generate stop
Y
Y
Clear IICIF
Master
mode?
RTI
Set TX mode
to Data reg
Write data
(read)
N
N
Y
from Data reg
Set Rx mode
Dummy read
Clear ARBL
IIAAS=1?
SRW=1?
Y
N (write)
Chapter 43 Inter-Integrated Circuit (I2C)
Address transfer
see note 1
Transmit
next byte
Y
Y
Y
from Data reg
Dummy read
Arbitration
IIAAS=1?
ACK from
receiver?
Switch to
Rx mode
Tx/Rx?
lost?
Tx
N
N
N
Data transfer
see note 2
Read data from
and store
Rx
Data reg
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