HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 996

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 32 Electrical Characteristics
Table 32.6 Clock Timing (2)
Conditions: VccQ = 3.0 to 3.6 V, Vcc = 1.70 to 2.05 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C,
Item
EXTAL clock input frequency
EXTAL clock input cycle time
EXTAL clock input low pulse width
EXTAL clock input high pulse width
EXTAL clock input rise time
EXTAL clock input fall time
CKIO clock input frequency
CKIO clock input cycle time
CKIO clock input low pulse width
CKIO clock input high pulse width
CKIO clock input rise time
CKIO clock input fall time
CKIO clock output frequency
CKIO clock output cycle time
CKIO clock output low pulse width
CKIO clock output high pulse width
CKIO clock output rise time
CKIO clock output fall time
CKIO2 clock output delay time
CKIO2 clock output rise time
CKIO2 clock output fall time
Power-on oscillation settling time
RESETP setup time
(At power on and cancellation of standby mode)
RESETM setup time (At cancellation of standby mode)
RESETP assert time
(At power on and cancellation of standby mode)
RESETM assert time (At cancellation of standby mode)
Standby return oscillation settling time 1
Standby return oscillation settling time 2
Standby return oscillation settling time 3
PLL synchronization settling time 1 (At cancellation of
standby mode)
PLL synchronization settling time 2 (At multiplier change)
IRQ/IRL interrupt determination time
(RTC used and standby mode)
Rev.6.00 Mar. 27, 2009 Page 938 of 1036
REJ09B0254-0600
100 MHz products
Symbol
f
t
t
t
t
t
f
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
EX
EXcyc
EXL
EXH
EXR
EXF
CKI
CKIcyc
CKIL
CKIH
CKIR
CKIF
OP
cyc
CKOL
CKOH
CKOR
CKOF
CK2D
CK2OR
CK2OF
OSC1
RESPS
RESMS
RESPW
RESMW
OSC2
OSC3
OSC4
PLL1
PLL2
IRQSTB
Min
6
20
4
4
—
—
24
20
4
4
—
—
24
20
3
3
—
—
—
—
—
10
20
0
20
20
10
10
11
100
100
100
Max
50
166.7
—
—
6
6
50
41.7
—
—
6
6
50
41.7
—
—
5
5
2.5
7
7
—
—
—
—
—
—
—
—
—
—
—
Unit
MHz
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
t
t
ms
ms
ms
μs
μs
μs
cyc
cyc
Figure
32.3
32.4
32.5
32.6
32.6, 32.7
32.7
32.8
32.9
32.10,
32.11
32.12
32.11