HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 94

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 2 CPU
Table 2.5
Bit
31–8
7
6
5
4
3–1
0
Rev.6.00 Mar. 27, 2009 Page 36 of 1036
REJ09B0254-0600
DSR Register Bits
Name (Abbreviation)
Reserved bits
Signed greater than bit
(GT)
Zero bit (Z)
Negative bit (N)
Overflow bit (V)
Status selection bits (CS) Designate the mode for selecting the operation result
DSP status bit (DC)
Function
0: Always read out; always use 0 as a write value
Indicates that the operation result is positive
(excepting 0), or that operand 1 is greater than
operand 2
1: Operation result is positive, or operand 1 is greater
Indicates that the operation result is zero (0), or that
operand 1 is equal to operand 2
1: Operation result is zero (0), or equivalence
Indicates that the operation result is negative, or that
operand 1 is smaller than operand 2
1: Operation result is negative, or operand 1 is
Indicates that the operation result has overflowed
1: Operation result has overflowed
status set in the DC bit
Do not set either 110 or 111
000: Carry/borrow mode
001: Negative value mode
010: Zero mode
011: Overflow mode
100: Signed greater mode
101: Signed above mode
Sets the status of the operation result in the mode
designated by the CS bits
0: Designated mode status not realized (unrealized)
1: Designated mode status realized
smaller