HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 807

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

24.2.20 HcRhDescriptorB
HcRhDescriptorB Register (H'0400044C)
The HcRhDescriptorB register is the second register of two registers describing the features of the
root hub. These bits are written during the initial setting so as to correspond to the system
implementation. The reset value is implementation specific.
Register: HcRhDescriptorB
Bits
31–16
15–0
Reset
0h
0h
R/W
R/W
R/W
Offset: 4C–4F
Description
PortPowerControlMask (PPCM)
This bit indicates that the port is influenced by the global power-
control command when the PowerSwitchingMode bit is set.
When this bit is set, the power state of the port is affected by
the power control at each port (set/clear port power). When this
bit is cleared, the port is controlled by the global power switch
(set/clear global power). If the device is placed in the global
switching mode (PowerSwitchingMode = 0), this bit is not valid.
Bit 15: Assured
Bit 16: Port #1 power mask
Bit 17: Port #2 power mask
Bit 31: Port #15 power mask
Note: Clear the No Power Switching of the RhDescriptorA
DeviceRemoveable (DR)
These bits are dedicated to the ports of the root hub. When
these bits are cleared, the set device becomes removable.
When these bits are set, do not remove the set device.
Bit 0: Assured
Bit 1: Device affixed to Port #1
Bit 2: Device affixed to Port #2
Bit 15: Device affixed to Port #15
…
…
register so that the power to all ports is OFF (Port Power
Status = 0), then set this bit.
Rev.6.00 Mar. 27, 2009 Page 749 of 1036
Section 24 USB HOST Module
REJ09B0254-0600