HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 229

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Table 7.3
IRL3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A noise-cancellation feature is built in, and the IRL interrupt is not detected unless the levels
sampled at every supporting module cycle remain unchanged for two consecutive cycles, so that
no transient level on the IRL pin change is detected. In the standby mode, as the peripheral clock
is stopped, noise cancellation is performed using the 32-kHz clock for the RTC instead. Therefore
Interrupt
request
IRL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
IRL3 to IRL0 Pins and Interrupt Levels
IRL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Figure 7.2 Example of IRL Interrupt Connection
IRL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
encoder
Priority
Interrupt Priority Level
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IRL3 to IRL0
Rev.6.00 Mar. 27, 2009 Page 171 of 1036
4
Section 7 Interrupt Controller (INTC)
IRL3 to IRL0
Interrupt Request
Level 15 interrupt request
Level 14 interrupt request
Level 13 interrupt request
Level 12 interrupt request
Level 11 interrupt request
Level 10 interrupt request
Level 9 interrupt request
Level 8 interrupt request
Level 7 interrupt request
Level 6 interrupt request
Level 5 interrupt request
Level 4 interrupt request
Level 3 interrupt request
Level 2 interrupt request
Level 1 interrupt request
No interrupt request
SH7727
REJ09B0254-0600