HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 603

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
18.1.3
Table 18.1 summarizes the smart card interface pins.
Table 18.1 SCI Pins
Pin Name
Serial clock pin
Receive data pin
Transmit data pin
18.1.4
Table 18.2 summarizes the registers used by the smart card interface. The SCSMR, SCBRR,
SCSCR, SCTDR, and SCRDR registers are the same as in the ordinary SCI function. They are
described in section 17, Serial Communication Interface (SCI).
Table 18.2 Registers
Name
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
Smart card mode register
Notes: 1. Only 0 can be written, to clear the flags.
2. Bits 0, 2, and 3 are cleared. The value of the other bits is undefined.
3. Initialized by a power-on or manual reset.
Pin Configuration
Register Configuration
Abbreviation
SCK0
RxD0
TxD0
Abbreviation
SCSMR
SCBRR
SCSCR
SCTDR
SCSSR
SCRDR
SCSCMR
I/O
Output
Input
Output
R/W
R/W
R/W
R/W
R/W
R/(W) *
R
R/W
1
Initial Value *
H'00
H'FF
H'00
H'FF
H'84
H'00
*
2
Function
Clock output
Receive data input
Transmit data output
Rev.6.00 Mar. 27, 2009 Page 545 of 1036
Section 18 Smart Card Interface
3
Address
H'FFFFFE80
H'FFFFFE82
H'FFFFFE84
H'FFFFFE86
H'FFFFFE88
H'FFFFFE8A
H'FFFFFE8C
REJ09B0254-0600
8
Access Size
8
8
8
8
8
8

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