HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 776

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Section 23 USB Function Controller
23.8
23.8.1
This section describes stall operations in the USB function module. There are two cases in which
the USB function module stall function is used:
• When the application forcibly stalls an endpoint for some reason
• When a stall is performed automatically within the USB function module due to a USB
The USB function module has internal status bits that hold the status (stall or non-stall) of each
endpoint. When a transaction is sent from the host, the module references these internal status bits
and determines whether to return a stall to the host. These bits cannot be cleared by the
application; they must be cleared with a Clear Feature command from the host.
23.8.2
The application uses the USBEPSTL register to issue a stall request for the USB function module.
When the application wishes to stall a specific endpoint, it sets the corresponding bit in
USBEPSTL (1-1 in figure 23.13). The internal status bits are not changed. When a transaction is
sent from the host for the endpoint for which the USBEPSTL bit was set, the USB function
module references the internal status bit, and if this is not set, references the corresponding bit in
USBEPSTL (1-2 in figure 23.13). If the corresponding bit in USBEPSTL is set, the USB function
module sets the internal status bit and returns a stall handshake to the host (1-3 in figure 23.13). If
the corresponding bit in USBEPSTL is not set, the internal status bit is not changed and the
transaction is accepted.
Once an internal status bit is set, it remains set until cleared by a Clear Feature command from the
host, without regard to the USBEPSTL register. Even after a bit is cleared by the Clear Feature
command (3-1 in figure 23.13), the USB function module continues to return a stall handshake
while the bit in USBEPSTL is set, since the internal status bit is set each time a transaction is
executed for the corresponding endpoint (1-2 in figure 23.13). To clear a stall, therefore, it is
necessary for the corresponding bit in USBEPSTL to be cleared by the application, and also for
the internal status bit to be cleared with a Clear Feature command (2-1, 2-2, and 2-3 in figure
23.13).
Rev.6.00 Mar. 27, 2009 Page 718 of 1036
REJ09B0254-0600
specification violation
Stall Operations
Overview
Forcible Stall by Application

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