HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 715
HD6417727F100CV
Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727F100CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
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21.1
This LSI has an AFE interface that supports softwaremodem. This AFE interface can efficiently
execute the modem processing, because it includes 128 stages of FIFO for each of transmission
and reception. This AFE interface also includes the interface to data access arrangement (DAA)
such as dial pulse generator circuit and ringing detection. Therefore, it is possible to establish a
modem system with a minimum of hardware.
21.1.1
• Serial interface with FIFO
• Clock synchronized serial interface
• Transmit/receive FIFO size is 16 bits (maximum) × 128 words
• Transmit/receive interrupt threshold size is programmable
• Dial pulse generator circuit is included
• Ringing detection (calling signal) function is included
Overview
Features
Section 21 Analog Front End Interface (AFEIF)
Section 21 Analog Front End Interface (AFEIF)
Rev.6.00 Mar. 27, 2009 Page 657 of 1036
REJ09B0254-0600
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