HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 330

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 10 On-Chip Oscillation Circuits
10.6.2
The WDT has two registers that select the clock, switch the timer mode, and perform other
functions. Table 10.5 shows the WDT register.
Table 10.5 Register Configuration
Name
Watchdog timer counter
Watchdog timer control/
status register
Note: * Write with a word access. Write H'5A and H'A5, respectively, in the upper bytes. Byte or
10.7
10.7.1
The watchdog timer counter (WTCNT) is an 8-bit read/write counter that increments on the
selected clock. The WTCNT differs from other registers in that it is more difficult to write to. See
section 10.7.3, Notes on Register Access, for details. When an overflow occurs, it generates a reset
in watchdog timer mode and an interrupt in interval time mode. Its address is H'FFFFFF84. The
WTCNT counter is initialized to H'00 by a power-on reset through the RESETP pin. Use a word
access to write to the WTCNT counter, with H'5A in the upper byte. Use a byte access to read
WTCNT.
Rev.6.00 Mar. 27, 2009 Page 272 of 1036
REJ09B0254-0600
Initial value:
longword writes are not possible. Read with a byte access.
Register Configurations
WDT Registers
Watchdog Timer Counter (WTCNT)
R/W:
Bit:
R/W
7
0
Abbreviation
WTCNT
WTCSR
R/W
6
0
R/W
5
0
R/W
R/W*
R/W*
R/W
H'00
H'00
Initial Value
4
0
R/W
3
0
Address
H'FFFFFF84
H'FFFFFF86
R/W
2
0
R/W
0
1
Access Size
R: 8;
W: 16*
R: 8;
W: 16*
R/W
0
0