HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 485

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 14 Direct Memory Access Controller (DMAC)
14.3.6
Source Address Reload Function
Channel 2 includes a reload function, in which the value set in the source address register (SAR2)
is restored every four transfers when the RO bit in CHCR2 is set to 1. This function cannot be
used with the 16-byte transfer. Figure 14.24 shows this operation. Figure 14.25 shows a timing
chart of the source address reload function with the following conditions: burst mode, auto
request, 16-bit transfer data size, SAR2 count-up, DAR2 fixed, reload function on, and usage of
only channel 2.
DMAC
DMAC control
RO bit = 1
CHCR2
Count signal
Transfer
DMATCR2
request
Reload signal
SAR2
Reload control
(initial value)
Reload
signal
SAR2
4 time
count
Figure 14.24 Source Address Reload Function Diagram
Rev.6.00 Mar. 27, 2009 Page 427 of 1036
REJ09B0254-0600