HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 527
HD6417727F100CV
Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727F100CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
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16.2.15 RTC Control Register 1 (RCR1)
The RTC control register 1 (RCR1) is an 8-bit read/write register that contains carry flags and
alarm flags. It also selects whether to generate interrupts for each flag. Avoid the use of read-
modify-write processing for this register because flags are sometimes set after an operand read.
RCR1 is an 8-bit read/write register. The CIE, AIE, and AF bits are initialized by a power-on reset
or manual reset. However, the value of the CF flag is undefined after a power-on reset or manual
reset. It must therefore be initialized without fail before use. This register is not initialized in
standby mode.
Bit 7—Carry Flag (CF): Status flag that indicates that a carry has occurred. CF is set to 1 when a
carry occurs in R64CNT or RSECCNT. If the count register is read at this time, the value is not
guaranteed; therefore, another read is required.
Bit 7: CF
0
1
Bits 6, 5, 2, and 1—Reserved: These bits are always read as 0 and should only be written with 0.
Bit 4—Carry Interrupt Enable Flag (CIE): Enables or disables interrupt generation when the
carry flag (CF) is set to 1.
Bit 4: CIE
0
1
Initial value:
R/W:
Bit:
Description
No carry in R64CNT or RSECCNT.
Clearing condition: When 0 is written to CF
Setting condition:
Carry occurred in RSECCNT
Read of R64CNT at carry occurrence
When 1 is written to CF
Description
A carry interrupt is not generated when the CF flag is set to 1
A carry interrupt is generated when the CF flag is set to 1
R/W
CF
—
7
—
R
6
0
—
R
5
0
R/W
CIE
4
0
Rev.6.00 Mar. 27, 2009 Page 469 of 1036
R/W
AIE
3
0
Section 16 Realtime Clock (RTC)
—
R
2
0
REJ09B0254-0600
—
R
1
0
(Initial value)
R/W
AF
0
0
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