HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 657

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
5. When modem control is enabled, the RTS2 signal is output when SCFRDR2 is empty. When
Serial
RTS2 is 0, reception is possible. When RTS2 is 1, this indicates that SCFRDR2 is full and
reception is not possible.
Figure 19.11 shows an example of the operation when modem control is used.
Serial
RTS2
RxD2
RDF
FER
data
data
1
Figure 19.11 Example of Operation Using Modem Control (RTS2)
Start
Start
bit
0
bit
0
D 0 D 1
D 0 D 1 D 2
Figure 19.10 Example of SCIF Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
One frame
Data
D 7
D 7
Parity
Section 19 Serial Communication Interface with FIFO (SCIF)
bit
RXI interrupt
0/1
Parity bit
request
0/1
Stop
bit
1
RXI interrupt handler
1
Data read and RDF
flag read as 1 then
Start
cleared to 0 by
bit
0
D 0
Rev.6.00 Mar. 27, 2009 Page 599 of 1036
Start
D 1
0
Data
D 7 0/1
request generated
Parity
by receive error
bit
ERI interrupt
Stop
bit
REJ09B0254-0600
1
(mark state)
Idle state
1

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