HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 139

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Table 2.26 Added CPU System Control Instructions
Instruction
SETRC #imm
SETRC Rn
LDRS
LDRE
STC
STC
STC
STS
STS
STS
STS
STS
STS
STS.L DSR,@-Rn
STS.L A0,@-Rn
STS.L X0,@-Rn
STS.L X1,@-Rn
STS.L Y0,@-Rn
STS.L Y1,@-Rn
STC.L MOD,@-Rn
STC.L RS,@-Rn
STC.L RE,@-Rn
LDS.L @Rn+,DSR
LDS.L @Rn+,A0
LDS.L @Rn+,X0
LDS.L @Rn+,X1
LDS.L @Rn+,Y0
LDS.L @Rn+,Y1
LDC.L @Rn+,MOD
LDC.L @Rn+,RS
@(disp,PC)
@(disp,PC)
MOD,Rn
RS,Rn
RE,Rn
DSR,Rn
A0,Rn
X0,Rn
X1,Rn
Y0,Rn
Y1,Rn
Instruction Code
10000010iiiiiiii
0100nnnn00010100
10001100dddddddd
10001110dddddddd
0000nnnn01010010
0000nnnn01100010
0000nnnn01110010
0000nnnn01101010
0000nnnn01111010
0000nnnn10001010
0000nnnn10011010
0000nnnn10101010
0000nnnn10111010
0100nnnn01100010
0100nnnn01110010
0100nnnn10000010
0100nnnn10010010
0100nnnn10100010
0100nnnn10110010
0100nnnn01010011
0100nnnn01100011
0100nnnn01110011
0100nnnn01100110
0100nnnn01110110
0100nnnn10000110
0100nnnn10010110
0100nnnn10100110
0100nnnn10110110
0100nnnn01010111
0100nnnn01100111
Operation
imm → RC (of SR)
Rn[11:0] → R C (of SR)
(disp × 2 + PC) → RS
(disp × 2 + PC) → RE
MOD → Rn
RS → Rn
RE → Rn
DSR → Rn
A0 → Rn
X0 → Rn
X1 → Rn
Y0 → Rn
Y1 → Rn
Rn – 4 → Rn, DSR → (Rn)
Rn – 4 → Rn, A0 → (Rn)
Rn – 4 → Rn, X0 → (Rn)
Rn – 4 → Rn, X1 → (Rn)
Rn – 4 → Rn, Y0 → (Rn)
Rn – 4 → Rn, Y1 → (Rn)
Rn – 4 → Rn, MOD → (Rn)
Rn – 4 → Rn, RS → (Rn)
Rn – 4 → Rn, RE → (Rn)
(Rn) → DSR, Rn + 4 → Rn
(Rn) → A0, Rn + 4 → Rn
(Rn) → X0, Rn + 4 → Rn
(Rn) → X1, Rn + 4 → Rn
(Rn) → Y0, Rn + 4 → Rn
(Rn) → Y1, Rn + 4 → Rn
(Rn) → MOD, Rn + 4 → Rn
(Rn) → RS, Rn + 4 → Rn
Rev.6.00 Mar. 27, 2009 Page 81 of 1036
REJ09B0254-0600
Execu-
tion
States
3
3
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
1
1
1
1
1
1
5
5
Section 2 CPU
T Bit

Related parts for HD6417727F100CV