HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 792

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 24 USB HOST Module
Register: HcCommandStatus
Bits
0
Rev.6.00 Mar. 27, 2009 Page 734 of 1036
REJ09B0254-0600
Reset
0b
R/W
R/W
Offset: 08–0B
Description
HostControllerReset (HCR)
This bit is set by HCD to initiate the software reset of the host
controller. The system is moved to the UsbSuspend state in
which most of the operational registers are reset except for the
next state regardless of the functional state of the host
controller. For example, an access to the InterrupRouting field
in HcControl and without host bus are allowed. This bit is
cleared by the host controller upon completion of the reset
operation. This bit does not cause any reset to the route hub
and the next reset signal is not issued to the downstream port.
0: Cleared by the host controller at the completion of the reset
1: UsbSuspend state
control