HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 815

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

24.3
24.3.1
USB Host Controller expects that data are compiled from lower address to upper address
regardless endian setting of the CPU. Below figure shows data read operation which is done by
USB Host Controller.
The correspondence between data in memory and data read by USB Host Controller must be
equal. When USB Host Controller reads data from external memory, USB Host Controller reads
data by long word read operation every time regardless that the read data are written in byte ,word
or long word. USB Host Controller uses data in byte from lower address in long word which it
reads regardless the endian mode. Even endian mode is set as big or little, set the data from down
addresses.
Below program flow is the example of failure.
1
2
3
size.
This example show that above operation transfers expected data #H'12.
st
nd
rd
In program, set transfer address A to register R0 at big endian
In program, “MOV.B #H'12,@R0”
In program , set transfer start address A to USB Host Controller , and set 1byte as transfer
Data Storage Format which Required by USB Host Controller
Storage Format of the Transferred Data
DATA.L
DATA.L
DATA.L
Program
H'11223344
H'55667788
H'00000099
+3
12
Memory
+2
00
+1
00
+0
00
+11
+3
11
+7
55
00
Memory (Area 3)
+10
+2
+6
22
66
00
LW read H ' 1 2 0 0 0 0 0 0
Actually transferred data
+1
33
+5
77
+9
00
Data expected to be transferred
Rev.6.00 Mar. 27, 2009 Page 757 of 1036
+0
44
+4
88
99
8
Section 24 USB HOST Module
LW read H'11223344
LW read H'55667788
LW read H'00000099
USB host
REJ09B0254-0600