HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 294

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Section 9 Power-Down Modes and Software Reset
9.2
9.2.1
The standby control register (STBCR) is an 8-bit readable/writable register that sets the power-
down mode. STBCR is initialized to H'00 by a power-on reset.
Bit 7—Standby (STBY): Specifies transition to standby mode.
Bit 7: STBY
0
1
Bits 6, 5, and 3—Reserved: These bits are always read as 0. The write value should always as 0.
Bit 4—Standby Crystal (STBXTL): Enables/disables crystal resonator in standby mode.
Bit 4: STBXTL
0
1
Bit 2—Module Stop 2 (MSTP2): Specifies halting the clock supply to the timer unit (TMU) in
the on-chip supporting module. When the MSTP2 bit is set to 1, the clock supply to the TMU is
halted.
Bit 2: MSTP2
0
1
Rev.6.00 Mar. 27, 2009 Page 236 of 1036
REJ09B0254-0600
Initial value:
Register Description
Standby Control Register (STBCR)
R/W:
Bit:
STBY
Description
Executing SLEEP instruction puts the chip into sleep mode.
Executing SLEEP instruction puts the chip into standby mode.
Description
Crystal oscillator in standby mode disabled
Crystal oscillator in standby mode enabled
Description
TMU runs.
Clock supply to TMU is halted.
R/W
7
0
R
6
0
R
5
0
STBXTL
R/W
4
0
R
3
0
MSTP2
R/W
2
0
MSTP1
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
MSTP0
R/W
0
0

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