HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 701

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

(3) Transmitting in Slave
Figure 20.11 shows an example of transmitting and operation in slave.
No.
1
2
3
4
5
6
Settting of SIMDR register,
SISCR register, SITDAR register,
SIRDAR register, SICDAR register,
SIFCTR register
"1" is set to TXE bit of SICTR register
Setting of SITDR register
Synchronized to SIOFSYNC send content
of SITDR from TXD_SIO
"0" is set to TXE bit of SICTR register
Finish to transmit?
TDREQ = 1?
Time chart
Figure 20.11 Example of Transmit Operation in Slave
Start
End
Y
Y
N
N
Setting of operation mode,
serial clock, slot position of
transmit or receive data,
slot position of control data
and limit of FIFO request
Set transmit enable
Set the transmit data
Set to transit disable
Setting content of SIOF
Rev.6.00 Mar. 27, 2009 Page 643 of 1036
Section 20 Serial IO (SIOF)
Disable to transmit when
frame synchronized
transmit submit the
transmit request
Transmit
Finish to transmit
SIOF operation
REJ09B0254-0600