HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 76

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 1 Overview and Pin Functions
Pin No.
(PRQP0240KC-B)
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
Rev.6.00 Mar. 27, 2009 Page 18 of 1036
REJ09B0254-0600
Pin No.
(PLBG0240JA-A) Name
P4
N1
N2
N3
N4
M1
M2
M3
M4
L1
L2
L4
L3
K1
K4
K3
K2
J3
J4
J2
J1
H4
H3
H2
H1
G4
G3
G2
G1
F4
SCK_SIO/SCPT[5]
SIOFSYNC/SCPT[6] IO/IO
RxD0/SCPT[0]
RxD_SIO/SCPT[2]
Vss
RxD2/SCPT[4]
Vcc
SCPT[7]/CTS2/IRQ5 I/I/I
LCD11/PTC[7]/
PINT[3]
LCD10/PTC[6]/
PINT[2]
LCD9/PTC[5]/
PINT[1]
VssQ
LCD8/PTC[4]/
PINT[0]
VccQ
LCD7/PTD[3]
LCD6/PTD[2]
LCD5/PTC[3]
LCD4/PTC[2]
LCD3/PTC[1]
LCD2/PTC[0]
LCD1/PTD[1]
LCD0/PTD[0]
DREQ0/PTD[4]
LCLK/UCLK/PTD[6]
RESETP
CA
MD3
MD4
Scan_testen
AVcc_USB
I/O
IO/IO
I/I
I/I
—
I/I
—
O/IO/I
O/IO/I
O/IO/I
—
O/IO/I
—
O/IO
O/IO
O/IO
O/IO
O/IO
O/IO
O/IO
O/IO
I/I
I/I/I
I
I
I
I
I
—
Function
SIOF communication clock /
SCI I/O port
SIOF frame synch. / SCI I/O port
Receive data 0 / SCI input port
SIOF receive data / SCI input port
Power supply (0 V)
Receive data 2 / SCI input port
Power supply (1.9 V)
SCI input port / SCIF clear to send /
external interrupt request
LCD data out / I/O port C /
port interrupt
LCD data out / I/O port C / port interrupt
LCD data out / I/O port C / port interrupt
Input/output power supply (0 V)
LCD data out / I/O port C / port interrupt
Input/output power supply (3.3 V)
LCD data out / I/O port D
LCD data out / I/O port D
LCD data out / I/O port C
LCD data out / I/O port C
LCD data out / I/O port C
LCD data out / I/O port C
LCD data out / I/O port D
LCD data out / I/O port D
DMA request / input port D
LCD clock / USB clock / input port D
Power-on reset request
Hardware standby request
Area 0 bus width setting
Area 0 bus width setting
Test pin (pull up to VccQ)
USB analog power supply (3.3 V)