HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 796
HD6417727F100CV
Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727F100CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
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Section 24 USB HOST Module
Register: HcInterruptEnable
Bits
31
30
29–7
6
5
4
3
2
1
0
Rev.6.00 Mar. 27, 2009 Page 738 of 1036
REJ09B0254-0600
Reset
0b
0b
0h
0b
0b
0b
0b
0b
0b
0b
R/W
R/W
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Offset: 10–13
Description
MasterInterruptEnable (MIE)
Setting of this bit to 0 is ignored by the host controller. When
this bit is set to 1, an interrupt generation by the event specified
in another bit in this register is enabled. This is used by HDC
that the master interrupt is enabled. When an interrupt is
detected by HCD, use the USBIH bit of Interrupt Controller
INTC.
0: Ignore (initial value)
1: Enable interrupt generation due to the specified event.
OwnershipChangeEnable (OC)
0: Ignore (initial value)
1: Enable interrupt generation due to Ownership Change.
Reserved.
RootHubStatusChangeEnable (RHSC)
0: Ignore (initial value)
1: Enable interrupt generation due to Root Hub Status Change.
FrameNumberOverflowEnable (FNO)
0: Ignore (initial value)
1: Enable interrupt generation due to Frame Number Overflow.
UnrecoverableErrorEnable(UE)
0: Ignore (initial value)
1: Enable interrupt generation due to unrecoverable error.
ResumeDetectedEnable (RD)
0: Ignore (initial value)
1: Enable interrupt generation due to Resume Detected.
StartOfFrameEnable (SF)
0: Ignore (initial value)
1: Enable interrupt generation due to Start of Frame.
WritebackDoneHeadEnable (WDH)
0: Ignore (initial value)
1: Enable interrupt generation due to Writeback Done Head.
SchedulingOverrunEnable (SO)
0: Ignore (initial value)
1: Enable interrupt generation due to Scheduling Overrun.
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