HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 805

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
24.2.19 HcRhDescriptorA
HcRhDescriptorA Register (H'04000448)
The HcRhDescriptorA register is the first register of two registers describing the features of the
root hub. The reset value is implementation specific. The descriptor length (11), descriptor type
(TBD), the hub controller current bit (0) of Class Descriptor of the hub are emulated by HCD. All
other bits are placed in the HcRhDescriptorA register and HcRhDescriptorB register.
Register: HcRhDescriptorA
Bits
31–24
23–13
12
11
10
Reset
02h
0h
1
0
0
R/W
R/W
R/W
R/W
R
Offset: 48–4B
Description
PowerOnToPowerGoodTime (POTPGT)
These bits specify the time required for waiting before
accessing the power-on port of the root hub. These bits are
implementation specific. The unit of time is 2 ms. The time is
calculated as POTPGT × 2 ms.
Reserved.
NoOverCurrentProtection (NOCP)
This bit selects how the over-current status of the root hub is
reported. When this bit is cleared, the
OverCureentProtectionMode bit specifies global report or report
at each port.
0: Over-current status is collectively reported for all downstream
1: Over-current protection is not supported. (initial value)
OverCurrentProtectionMode (OCPM)
This bit selects how the over-current status in the root-hub port
is reported. At reset, this bit reflects the same mode of
PowerSwitchingMode. When the NoOverCureentProtection bit
is cleared, this bit is valid.
0: Over-current status is collectively reported for all downstream
1: Over-current protection is not supported.
DeviceType (DT)
USB Host Controller is not a compound device. Always set to 0.
ports.
ports. (initial value)
Rev.6.00 Mar. 27, 2009 Page 747 of 1036
Section 24 USB HOST Module
REJ09B0254-0600

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