HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 749
![SH3-DSP, LEAD FREE](/photos/28/62/286203/240-bfqfp__prqp0240kc-b_sml.jpg)
HD6417727F100CV
Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727F100CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
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23.1
• Incorporates UDC (USB device controller) conforming to USB1.1
• Transfer speed: Full-speed
• Endpoint configuration
• Interrupt requests: generates various interrupt signals necessary for USB
• Clock: Selection by means of EXCPG
• Power-down mode
• Can be connected to a Philips PDIUSBP11 Series transceiver or compatible product (when
• This USB function controller is a self-power device. It cannot operate by power supplied from
Automatic processing of USB protocol
Automatic processing of USB standard commands for endpoint 0 (some commands and
class/vendor commands require decoding and processing by firmware)
Configuration 1 — Interface 0 — Alternate setting 0
transmission/reception
For details, see section 11, Extend Clock Pulse Generator for USB (EXCPG).
Power consumption can be reduced by stopping internal clock when UDC cable is
disconnected
Automatic transition to/recovery from suspend state
using a compatible product, carry out evaluation and investigation with the manufacturer
supplying the transceiver beforehand)
the USB cable.
Endpoint
Name
Endpoint 0
Endpoint 1
Endpoint 2
Endpoint 3
Features
Section 23 USB Function Controller
Abbreviation
EP0s
EP0i
EP0o
EP1
EP2
EP3
Transfer Type
Setup
Control-in
Control-out
Bulk-out
Bulk-in
Interrupt
Maximum
Packet Size
8
8
8
64
64
8
Rev.6.00 Mar. 27, 2009 Page 691 of 1036
End point 1
End point 2
End point 3
Section 23 USB Function Controller
FIFO Buffer
Capacity
8
8
8
128
128
8
REJ09B0254-0600
DMA Transfer
—
—
—
Possible
Possible
—
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