HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 518

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 16 Realtime Clock (RTC)
16.1.4
Table 16.2 shows the RTC register configuration.
Table 16.2 RTC Registers
Name
64-Hz counter
Second counter
Minute counter
Hour counter
Day of week counter
Date counter
Month counter
Year counter
Second alarm register
Minute alarm register
Hour alarm register
Day of week alarm register
Date alarm register
Month alarm register
RTC control register 1
RTC control register 2
Note: * Only the ENB bit in each register is initialized.
Rev.6.00 Mar. 27, 2009 Page 460 of 1036
REJ09B0254-0600
RTC Register Configuration
Abbreviation
R64CNT
RSECCNT
RMINCNT
RHRCNT
RWKCNT
RDAYCNT
RMONCNT
RYRCNT
RSECAR
RMINAR
RHRAR
RWKAR
RDAYAR
RMONAR
RCR1
RCR2
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Undefined
Undefined
Undefined
Undefined
Undefined*
Undefined*
Initial Value
Undefined
Undefined
Undefined
Undefined
Undefined*
Undefined*
Undefined*
Undefined*
H'00
H'09
Address
H'FFFFFEC0
H'FFFFFEC2
H'FFFFFEC4
H'FFFFFEC6
H'FFFFFEC8
H'FFFFFECA
H'FFFFFECC
H'FFFFFECE
H'FFFFFED0
H'FFFFFED2
H'FFFFFED4
H'FFFFFED6
H'FFFFFED8
H'FFFFFEDA
H'FFFFFEDC
H'FFFFFEDE
Access Size
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8