HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 242

SH3-DSP, LEAD FREE

HD6417727F100CV

Manufacturer Part Number
HD6417727F100CV
Description
SH3-DSP, LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP Exposed Pad, 240-eQFP, 240-HQFP
Cpu Family
SuperH
Device Core Size
32b
Frequency (max)
100MHz
Interface Type
SCI/USB
Program Memory Size
Not Required
Total Internal Ram Size
16KB
# I/os (max)
104
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
2.05/3.6V
Operating Supply Voltage (min)
1.6/2.6V
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
RISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Section 7 Interrupt Controller (INTC)
7.3.4
The ICR2 is a 16-bit read/write register that sets the detection mode to external interrupt input pins
PINT0 to PINT15. This register is initialized to H'0000 at power-on reset or manual reset, but is
not initialized in standby mode.
Bits 15 to 0—PINT15 to PINT0 Sense Select (PINT15S to PINT0S): Select whether interrupt
request signals to PINT15 to PINT0 are detected at low levels or high levels.
Bits 15 to 0:
PINT15S to PINT0S
0
1
Rev.6.00 Mar. 27, 2009 Page 184 of 1036
REJ09B0254-0600
Initial value:
Initial value:
Interrupt Control Register 2 (ICR2)
R/W:
R/W:
Bit:
Bit:
PINT15S PINT14S PINT13S PINT14S PINT11S PINT10S PINT9S PINT8S
PINT7S PINT6S PINT5S PINT4S PINT3S PINT2S PINT1S PINT0S
R/W
R/W
15
0
7
0
Description
Interrupt requests are detected at low level input to the PINT pins
Interrupt requests are detected at high level input to the PINT pins
R/W
R/W
14
0
6
0
R/W
R/W
13
0
5
0
R/W
R/W
12
0
4
0
R/W
R/W
11
0
3
0
R/W
R/W
10
0
2
0
R/W
R/W
0
0
9
1
(Initial value)
R/W
R/W
8
0
0
0

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