NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 712
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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PCI Express* Configuration Registers
19.1.61
19.1.62
712
ULD — Upstream Link Description Register
ESD — Element Self Description Register
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
(PCI Express—D28:F0/F1/F2/F3)
Address Offset:
Default Value:
31:24
23:16
31:24
23:16
15:8
15:2
Bit
7:4
3:0
Bit
1
0
Port Number (PN) — RO. This field indicates the ingress port number for the root port. There is a
different value per port:
Component ID (CID) — RO. This field returns the value of the ESD.CID field (Chipset Configuration
Space:Offset 0104h:bits 23:16) of the chip configuration section, that is programmed by platform
BIOS, since the root port is in the same component as the RCRB.
Number of Link Entries (NLE) — RO. (Default value is 01h) Indicates one link entry
(corresponding to the RCRB).
Reserved.
Element Type (ET) — RO. (Default value is 0h) Indicates that the element type is a root port.
Target Port Number (PN) — RO. Indicates the port number of the RCRB.
Target Component ID (TCID) — RO. This field returns the value of the ESD.CID field (Chipset
Configuration Space:Offset 0104h:bits 23:16) of the chip configuration section, that is programmed
by platform BIOS, since the root port is in the same component as the RCRB.
Reserved.
Link Type (LT) — RO. Indicates that the link points to the ICH6 RCRB.
Link Valid (LV) — RO. Indicates that this link entry is valid.
Port #
1
2
3
4
184
See Description
190
00000001h
–
–
Value
187h
01h
02h
03h
04h
193h
Intel
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
32 bits
32 bits
RO
RO
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