NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 299

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

8.2.5
Intel
Table 8-5. Self-Test Results Format
®
I/O Controller Hub 6 (ICH6) Family Datasheet
EEPROM_CNTL—EEPROM Control Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
The EEPROM Control Register is a 16-bit field that enables a read from and a write to the external
EEPROM.
31:13
11:6
Bit
1:0
Bit
7:4
12
5
4
3
2
3
2
1
0
Reserved
General Self-Test Result (SELF_TST) — R/W (special).
0 = Pass
1 = Fail
Reserved
Diagnose Result (DIAG_RSLT) — R/W (special). This bit provides the result of an internal
diagnostic test of the Serial Subsystem.
0 = Pass
1 = Fail
Reserved
Register Result (REG_RSLT) — R/W (special). This bit provides the result of a test of the internal
Parallel Subsystem registers.
0 = Pass
1 = Fail
ROM Content Result (ROM_RSLT) — R/W (special). This bit provides the result of a test of the
internal microcode ROM.
0 = Pass
1 = Fail
Reserved
Reserved
EEPROM Serial Data Out (EEDO) — RO. Note that this bit represents “Data Out” from the
perspective of the EEPROM device. This bit contains the value read from the EEPROM when
performing read operations.
EEPROM Serial Data In (EEDI) — WO. Note that this bit represents “Data In” from the perspective
of the EEPROM device. The value of this bit is written to the EEPROM when performing write
operations.
EEPROM Chip Select (EECS) — R/W.
0 = Drives the ICH6’s EE_CS signal low to disable the EEPROM. this bit must be set to 0 for a
1 = Drives the ICH6’s EE_CS signal high, to enable the EEPROM.
EEPROM Serial Clock (EESK) — R/W. Toggling this bit clocks data into or out of the EEPROM.
Software must ensure that this bit is toggled at a rate that meets the EEPROM component’s
minimum clock frequency specification.
0 = Drives the ICH6’s EE_SHCLK signal low.
1 = Drives the ICH6’s EE_SHCLK signal high.
minimum of 1 µs between consecutive instruction cycles.
0Eh
00h
Description
Description
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
RO, R/W, WO
8 bits
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