NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 632

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Intel
18.1.10
18.1.11
18.1.12
18.1.13
632
®
High Definition Audio Controller Registers (D27:F0)
HDBARL—Intel
HDBARU—Intel
LT—Latency Timer Register
(Intel
Address Offset:
Default Value:
HEADTYP—Header Type Register
(Intel
Address Offset:
Default Value:
Address Register
(Intel
Address Offset:
Default Value:
Address Register
(Intel
Address Offset:
Default Value:
31:14
13:4
31:0
Bit
7:0
Bit
7:0
Bit
2:1
Bit
3
0
®
®
®
®
Latency Timer — RO. Hardwired to 00
Header Type — RO. Hardwired to 00.
Lower Base Address (LBA) — R/W. Base address for the Intel High Definition Audio controller’s
memory mapped configuration registers. 16 KB are requested by hardwiring bits 13:4 to 0s.
RO. Hardwired to 0s
Prefetchable (PREF) — RO. Hardwired to 0 to indicate that this BAR is NOT prefetchable
Address Range (ADDRNG) — RO. Hardwired to 10b, indicating that this BAR can be located
anywhere in 64-bit address space.
Space Type (SPTYP) — RO. Hardwired to 0. Indicates this BAR is located in memory space.
Upper Base Address (UBA) — R/W. Upper 32 bits of the base address for the Intel High Definition
Audio controller’s memory mapped configuration registers.
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
0Dh
00h
0Eh
00h
10h
00000004h
14h
00000000h
®
®
High Definition Audio Lower Base
High Definition Audio Upper Base
Intel
Description
Description
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
RO
RO
R/W, RO
32 bits
32 bits
8 bits
8 bits
R/W