NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 208
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
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Functional Description
5.20.8.4
5.20.9
5.20.10
208
Effect of Resets on Port-Routing Logic
As mentioned above, the Port Routing logic is implemented in the suspend power well so that
remuneration and re-mapping of the USB ports is not required following entering and exiting a
system sleep state in which the core power is turned off.
USB 2.0 Legacy Keyboard Operation
The ICH6 must support the possibility of a keyboard downstream from either a full-speed/low-
speed or a high-speed port. The description of the legacy keyboard support is unchanged from
USB 1.1 (See
The EHC provides the basic ability to generate SMIs on an interrupt event, along with more
sophisticated control of the generation of SMIs.
USB 2.0 Based Debug Port
The ICH6 supports the elimination of the legacy COM ports by providing the ability for new
debugger software to interact with devices on a USB 2.0 port.
High-level restrictions and features are:
Suspend Well Reset
Core Well Reset
D3-to-D0 Reset
HCRESET
•
•
•
•
•
•
•
Operational before USB 2.0 drivers are loaded.
Functions even when the port is disabled.
Works even though non-configured port is default-routed to the UHCI. Note that the Debug
Port can not be used to debug an issue that requires a full-speed/low-speed device on Port #0
using the UHCI drivers.
Allows normal system USB 2.0 traffic in a system that may only have one USB port.
Debug Port device (DPD) must be high-speed capable and connect directly to Port #0 on ICH6
systems (e.g., the DPD cannot be connected to Port #0 thru a hub).
Debug Port FIFO always makes forward progress (a bad status on USB is simply presented
back to software).
The Debug Port FIFO is only given one USB access per microframe.
Reset Event
Section
5.19.8).
cleared (0)
no effect
no effect
cleared (0)
Effect on Configure Flag
Intel
®
Effect on Port Owner Bits
set (1)
no effect
no effect
set (1)
I/O Controller Hub 6 (ICH6) Family Datasheet
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