NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 591

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

16.1.21
16.1.22
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
PID—PCI Power Management Capability Identification
Register (Audio—D30:F2)
Address Offset:
Default Value:
Lockable:
PC—Power Management Capabilities Register
(Audio—D30:F2)
Address Offset:
Default Value:
Lockable:
This register is not affected by the D3
15:11
15:8
10:9
Bit
7:0
Bit
8:6
2:0
5
4
3
Next Capability (NEXT) — RO. This field indicates that the next item in the list is at offset 00h.
Capability ID (CAP) — RO.This field indicates that this pointer is a message signaled interrupt
capability
PME Support — RO. This field indicates PME# can be generated from all D states.
Reserved.
Auxiliary Current — RO. This field reports 375 mA maximum suspend well current required when in
the D3
Device Specific Initialization (DSI)—RO. This field indicates that no device-specific initialization is
required.
Reserved — RO.
PME Clock (PMEC) — RO. This field indicates that PCI clock is not required to generate PME#.
Version (VER) — RO. This field indicates support for Revision 1.1 of the PCI Power Management
Specification .
COLD
50
0001h
No
52
C9C2h
No
state.
–
–
51h
53h
HOT
to D0 transition.
AC ’97 Audio Controller Registers (D30:F2)
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
RO
16 bits
Core
RO
16 bits
Core
591