NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 313
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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8.3.6
8.3.7
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
APM—APM Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register contains the configuration bit to disable state-based security.
WTIM_CONF—Watchdog Timer Configuration Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register contains a single bit that enables the Watchdog timer. This bit is not intended to be
accessed by software, but should be configured appropriately in the EEPROM location for this
register default. The bit provides real-time control for enabling/disabling the Watchdog timer.
When set the timer will count down. When cleared the counter will stop. Timer Start ASF SMBus
messages will set this bit. Timer Stop ASF SMBus transactions will clear this bit.
Bit
7:1
Bit
7:4
2:0
0
3
Reserved
Timer Enable (WDG_ENA) — R/W.
0 = Disable
1 = Enable Counter
Reserved
Disable State-based Security (APM_DISSB) — R/W.
0 = State-based security on OSHung is enabled.
1 = State-based security is disabled and actions are not gated by OSHung.
Reserved
E5h
08h
E8h
00h
Description
Description
Attribute:
Size:
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
R/W
8 bits
R/W
8 bits
313
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