NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 60

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Signal Description
2.7
60
Table 2-6. PCI Interface Signals (Sheet 3 of 3)
Table 2-7. Serial ATA Interface Signals (Sheet 1 of 2)
Serial ATA Interface
(Desktop Only)
(Mobile Only) /
SATARBIAS#
SATA[0]RXN
SATA[1]RXN
SATA[2]RXN
SATA[3]RXN
CLKRUN#
SATA[0]TXN
SATA[0]RXP
SATA[1]TXN
SATA[1]RXP
SATA[2]TXN
SATA[2]RXP
SATA[3]TXN
SATA[3]RXP
SATA[0]TXP
SATA[1]TXP
SATA[2]TXP
SATA[3]TXP
SATARBIAS
GPIO[32]
PLOCK#
SERR#
Name
PME#
Name
OD I/O
Type
OD I
I/O
I/O
Type
O
O
O
O
O
I
I
I
I
I
PCI Lock: This signal indicates an exclusive bus operation and may require
multiple transactions to complete. ICH6 asserts PLOCK# when it performs non-
exclusive transactions on the PCI bus. PLOCK# is ignored when PCI masters are
granted the bus in desktop configurations. Devices on the PCI bus (other than the
ICH6) are not permitted to assert the PLOCK# signal in mobile configurations.
System Error: SERR# can be pulsed active by any PCI device that detects a
system error condition. Upon sampling SERR# active, the ICH6 has the ability to
generate an NMI, SMI#, or interrupt.
PCI Power Management Event: PCI peripherals drive PME# to wake the system
from low-power states S1–S5. PME# assertion can also be enabled to generate an
SCI from the S0 state. In some cases the ICH6 may drive PME# active due to an
internal wake event. The ICH6 will not drive PME# high, but it will be pulled up to
VccSus3_3 by an internal pull-up resistor.
PCI Clock Run: This signal is used to support PCI Clock Run protocol. It connects
to PCI devices that need to request clock re-start, or prevention of clock stopping.
NOTE: An external pull-up to Vcc3_3 is required.
Serial ATA 0 Differential Transmit Pair: These are outbound high-speed
differential signals to Port 0.
Serial ATA 0 Differential Receive Pair: These are inbound high-speed
differential signals from Port 0.
Serial ATA 1 Differential Transmit Pair: These are outbound high-speed
differential signals to Port 1. (Desktop Only)
Serial ATA 1 Differential Receive Pair: These are inbound high-speed
differential signals from Port 1. (Desktop Only)
Serial ATA 2 Differential Transmit Pair: These are outbound high-speed
differential signals to Port 2.
Serial ATA 2 Differential Receive Pair: These are inbound high-speed
differential signals from Port 2.
Serial ATA 3 Differential Transmit Pair: These are outbound high-speed
differential signals to Port 3. (Desktop Only)
Serial ATA 3 Differential Receive Pair: These are inbound high-speed
differential signals from Port 3. (Desktop Only)
Serial ATA Resistor Bias: These are analog connection points for an external
resistor to ground.
Serial ATA Resistor Bias Complement: These are analog connection points
for an external resistor to ground.
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Description
Description