NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 317

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

8.3.15
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
STA—Status Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register gives status indication about several aspects of ASF.
Bit
5:4
7
6
3
2
1
0
EEPROM Loading (STA_LOAD) — R/W. EEPROM defaults are in the process of being loaded
when this bit is a 1.
EEPROM Invalid Checksum Indication (STA_ICRC) — R/W. This bit should be read only after the
EEC_LOAD bit is a 0.
0 = Valid
1 = Invalid checksum detected for ASF portion of the EEPROM.
Reserved
Power Cycle Status (STA_CYCLE) — R/W.
0 = Software clears this bit by writing a 1.
1 = This bit is set when a Power Cycle operation has been issued.
Power Down Status (STA_DOWN) — R/W.
0 = Software clears this bit by writing a 1
1 = This bit is set when a Power Down operation has been issued.
Power Up Status (STA_UP) — R/W.
0 = Software clears this bit by writing a 1
1 = This bit is set when a Power Up operation has been issued.
System Reset Status (STA_RST) — R/W.
0 = Software clears this bit by writing a 1
1 = This bit is set when a System Reset operation has been issued.
F2h
40h
Description
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
R/W
8 bits
317