NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 489
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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12.3.1.3
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
IS—Interrupt Status Register (D31:F2)
Address Offset:
Default Value:
This register indicates which of the ports within the controller have an interrupt pending and
require service.
(Desktop
(Desktop
(Mobile
(Mobile
Only)
Only)
Only)
Only)
31:4
Bit
3
3
2
1
1
0
Reserved. Returns 0.
Reserved. Returns 0.
Interrupt Pending Status Port[3] (IPS[3]) — R/WC .
0 = No interrupt pending.
1 = Port 3 has an interrupt pending. Software can use this information to determine which ports
Interrupt Pending Status Port[2] (IPS[2]) — R/WC
0 = No interrupt pending.
1 = Port 2 has an interrupt pending. Software can use this information to determine which ports
Reserved. Returns 0.
Interrupt Pending Status Port[1] (IPS[1]) — R/WC .
0 = No interrupt pending.
1 = Port 1has an interrupt pending. Software can use this information to determine which ports
Interrupt Pending Status Port[0] (IPS[0]) — R/WC .
0 = No interrupt pending.
1 = Port 0 has an interrupt pending. Software can use this information to determine which ports
require service after an interrupt.
require service after an interrupt.
require service after an interrupt.
require service after an interrupt.
ABAR + 08h
00000000h
–
0Bh
Description
Attribute:
Size:
SATA Controller Registers (D31:F2)
R/WC, RO
32 bits
489
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