NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 262
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
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Chipset Configuration Registers
7.1.36
7.1.37
7.1.38
262
DMC—DMI Miscellaneous Control Register (Mobile Only)
Offset Address:
Default Value:
CSCR1—Chipset Configuration Register 1
Offset Address:
Default Value:
CSCR2—Chipset Configuration Register 2
Offset Address:
Default Value:
31:28
31:2
27:9
Bit
Bit
8:6
5:0
Bit
7:0
1
0
Reserved
DMI Misc. Control Field 1 — R/W. BIOS shall always program this field as per the BIOS
Specification.
0 = Disable DMI Power Savings.
1 = Enable DMI Power Savings.
Reserved
Chipset Configuration Register 1 Bits[31:28] — R/W. Refer to the ICH6 BIOS Specification for
the programming of this field.
Reserved
Chipset Configuration Register 1 Bits[8:6] — R/W. BIOS programs this field to 001b.
Reserved
Chipset Configuration Register 2 Bits[7:0] — R/W. BIOS programs this field to 0Dh.
2010–2013h
N/A
2020–2023h
00C4B0DBh
2027h
0Ah
Intel
®
Description
Description
Description
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/W
32-bit
8-bits
R/W
32-bits
R/W
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