NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 614

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

AC ’97 Modem Controller Registers (D30:F3)
17.1.16
17.1.17
17.1.18
614
INT_PIN—Interrupt Pin Register (Modem—D30:F3)
Address Offset:
Default Value:
Lockable:
This register indicates which PCI interrupt pin is used for the AC ’97 modem interrupt. The AC ’97
interrupt is internally OR’d to the interrupt controller with the PIRQB# signal.
PID—PCI Power Management Capability Identification
Register (Modem—D30:F3)
Address Offset:
Default Value:
Lockable:
PC—Power Management Capabilities Register
(Modem—D30:F3)
Address Offset:
Default Value:
Lockable:
15:11
15:8
10:9
Bit
7:3
2:0
Bit
7:0
Bit
8:6
2:0
5
4
3
Reserved
Interrupt Pin (INT_PN) — RO. This reflects the value of D30IP.AMIP in chipset configuration space.
Next Capability (NEXT) — RO. This field indicates that this is the last item in the list.
Capability ID (CAP) — RO. This field indicates that this pointer is a message signaled interrupt
capability.
PME Support — RO. This field indicates PME# can be generated from all D states.
Reserved.
Auxiliary Current — RO. This field reports 375 mA maximum Suspend well current required when in
the D3
Device Specific Initialization (DSI) — RO. This bit indicates that no device-specific initialization is
required.
Reserved — RO.
PME Clock (PMEC) — RO. This bit indicates that PCI clock is not required to generate PME#.
Version (VS) — RO. This field indicates support for Revision 1.1 of the PCI Power Management
Specification.
COLD
3Dh
See description
No
50h
0001h
No
52h
C9C2h
No
state.
Intel
Description
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
RO
Core
RO
16 bits
Core
RO
16 bits
Core
8 bits