NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 220
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
- Current page: 220 of 786
- Download datasheet (5Mb)
Functional Description
5.21.4
220
Table 5-48. Enable for SMBALERT#
Table 5-49. Enables for SMBus Slave Write and SMBus Host Events
Table 5-50. Enables for the Host Notify Command
Interrupts / SMI#
The ICH6 SMBus controller uses PIRQB# as its interrupt pin. However, the system can
alternatively be set up to generate SMI# instead of an interrupt, by setting the SMBus_SMI_EN bit
(Device 31:Function 0:Offset 40h:bit 1).
Table 5-49
generation of the interrupt, Host and Slave SMI, and Wake internal signals. The rows in the tables
are additive, which means that if more than one row is true for a particular scenario then the Results
for all of the activated rows will occur.
Slave Write to Wake/
SMI# Command
Slave Write to
SMLINK_SLAVE_SMI
Command
Any combination of
Host Status Register
[4:1] asserted
SMBALERT#
asserted low
(always reported
in Host Status
Register, Bit 5)
Register, Offset 11h, bit 0)
HOST_NOTIFY_INTREN
(Slave Control I/O
Event
Event
and
X
0
1
1
Table 5-50
Register, Offset
INTREN (Host
Control I/O
02h, Bit 0)
INTREN (Host Control
I/O Register, Offset
X
X
1
specify how the various enable bits in the SMBus function control the
02h, Bit 0)
D31:F3:Off40h, Bit 1)
SMB_SMI_EN (Host
Configuration
X
X
0
1
1
Register,
SMB_SMI_EN (Host
D31:F3:Offset 40h,
X
X
0
1
Configuration
Register,
Bit 1)
X
1
0
Intel
D31:F3:Offset 40h, Bit1)
Configuration Register,
SMB_SMI_EN (Host
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Register, Offset 11h, bit 1)
HOST_NOTIFY_WKEN
(Slave Control I/O
X
X
X
0
1
(Slave Command I/O
Register, Offset 11h,
SMBALERT_DIS
0
1
X
X
Bit 2)
X
0
0
Wake generated when asleep.
Slave SMI# generated when
awake (SMBus_SMI_STS).
Slave SMI# generated when in
the S0 state (SMBus_SMI_STS)
None
Interrupt generated
Host SMI# generated
None
Wake generated
Interrupt generated
Slave SMI# generated
(SMBus_SMI_STS)
Wake generated
Slave SMI# generated
(SMBus_SMI_STS)
Interrupt generated
Event
Result
Result
Related parts for NH82801FBM S L89K
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Intel
Datasheet:
Part Number:
Description:
Microprocessor: Intel Celeron M Processor 320 and Ultra Low Voltage Intel Celeron M Processor at 600MHz
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 82550 Fast Ethernet Multifunction PCI/CardBus Controller
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 64 Mbit. Access speed 150 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 100 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
DA28F640J5A-1505 Volt Intel StrataFlash Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 6300ESB I/O Controller Hub
Manufacturer:
Intel Corporation
Datasheet: