NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 633

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

18.1.14
18.1.15
T
18.1.16
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
SVID—Subsystem Vendor Identification Register
(Intel
Address Offset:
Default Value:
The SVID register, in combination with the Subsystem ID register (D27:F0:2Eh), enable the
operating environment to distinguish one audio subsystem from the other(s).
This register is implemented as write-once register. Once a value is written to it, the value can be
read back. Any subsequent writes will have no effect.
This register is not affected by the D3
SID—Subsystem Identification Register
(Intel
Address Offset:
Default Value:
The SID register, in combination with the Subsystem Vendor ID register (D27:F0:2Ch) make it
possible for the operating environment to distinguish one audio subsystem from the other(s).
This register is implemented as write-once register. Once a value is written to it, the value can be
read back. Any subsequent writes will have no effect.
This register is not affected by the D3
CAPPTR—Capabilities Pointer Register (Audio—D30:F2)
Address Offset:
Default Value:
This register indicates the offset for the capability pointer.
15:0
15:0
Bit
Bit
Bit
7:0
®
®
Subsystem Vendor ID — R/WO.
Subsystem ID — R/WO.
Capabilities Pointer (CAP_PTR) — RO. This field indicates that the first capability pointer offset is
offset 50h (Power Management Capability)
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
2C–2Dh
0000h
2E
0000h
34h
50h
–
2Fh
Intel
®
High Definition Audio Controller Registers (D27:F0)
HOT
HOT
to D0 transition.
to D0 transition.
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/WO
16 bits
R/WO
16 bits
RO
8 bits
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