NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 437

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
11
11.1
Intel
Table 11-1. IDE Controller PCI Register Address Map (IDE-D31:F1)
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Note: Address locations that are not shown should be treated as Reserved (See
IDE Controller Registers (D31:F1)
PCI Configuration Registers (IDE—D31:F1)
All of the IDE registers are in the core well. None of the registers can be locked.
NOTE: The ICH6 IDE controller is not arbitrated as a PCI device; therefore, it does not need a master latency
2C–2Dh
1C–1Fh
4A–4Bh
18–1Bh
2E–2Fh
00–01h
02–03h
04–05h
06–07h
10–13h
14–17h
20–23h
40–41h
42–43h
Offset
0Ch
0Dh
C0h
C4h
08h
09h
0Ah
0Bh
44h
48h
54h
3C
3D
IDE_CONFIG
SLV_IDETIM
PCMD_BAR
SCMD_BAR
SDMA_CNT
PCNL_BAR
SCNL_BAR
SDMA_TIM
Mnemonic
BM_BASE
IDE_TIMP
IDE_TIMS
IDE_SVID
INTR_LN
INTR_PN
PCICMD
IDE_SID
PCISTS
PMLT
SCC
BCC
CLS
ATC
ATS
VID
DID
RID
PI
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
Programming Interface
Sub Class Code
Base Class Code
Cache Line Size
Primary Master Latency Timer
Primary Command Block Base Address
Primary Control Block Base Address
Secondary Command Block Base Address
Secondary Control Block Base Address
Bus Master Base Address
Subsystem Vendor ID
Subsystem ID
Interrupt Line
Interrupt Pin
Primary IDE Timing
Secondary IDE Timing
Slave IDE Timing
Synchronous DMA Control
Synchronous DMA Timing
IDE I/O Configuration
APM Trapping Control
APM Trapping Status
Register Name
IDE Controller Registers (D31:F1)
Section 6.2
See register
See register
description.
00000001h
00000001h
00000001h
00000001h
00000001h
description.
00000000h
Default
8086h
266Fh
0280h
0000h
0000h
0000h
0000h
8Ah
00h
01h
01h
00h
00h
00h
01h
00h
00h
00h
00h
for details).
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/W, RO
R/WO
R/WO
R/WC
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
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