NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 661
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
- Current page: 661 of 786
- Download datasheet (5Mb)
18.2.17
18.2.18
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
CORBRP—CORB Read Pointer Register
(Intel
Memory Address: HDBAR + 4Ah
Default Value:
CORBCTL—CORB Control Register
(Intel
Memory Address: HDBAR + 4Ch
Default Value:
14:8
Bit
7:0
Bit
7:2
15
1
0
®
®
CORB Read Pointer Reset — R/W. Software writes a 1 to this bit to reset the CORB Read Pointer
to 0 and clear any residual prefetched commands in the CORB hardware buffer within the Intel High
Definition Audio controller. The hardware will physically update this bit to 1 when the CORB Pointer
reset is complete. Software must read a 1 to verify that the reset completed correctly. Software must
clear this bit back to 0 and read back the 0 to verify that the clear completed correctly. The CORB
DMA engine must be stopped prior to resetting the Read Pointer or else DMA transfer may be
corrupted.
Reserved.
CORB Read Pointer — R/W. Software reads this field to determine how many commands it can
write to the CORB without over-running. The value read indicates the CORB Read Pointer offset in
DWord granularity. The offset entry read from this field has been successfully fetched by the DMA
controller and may be over-written by software. Supports 256 CORB entries (256x4B = 1KB). This
register field may be ready while the DMA engine is running.
Reserved.
Enable CORB DMA Engine — R/W.
0 = DMA stop
1 = DMA run
After software writes a 0 to this bit, the hardware may not stop immediately. The hardware will
physically update the bit to 0 when the DMA engine is truly stopped. Software must read a 0 from
this bit to verify that the DMA engine is truly stopped.
CORB Memory Error Interrupt Enable — R/W.
If this bit is set the controller will generate an interrupt if the CMEI status bit (HDBAR + 4Dh: bit 0) is
set.
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
0000h
00h
Intel
®
High Definition Audio Controller Registers (D27:F0)
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W
16 bits
R/W
8 bits
661
Related parts for NH82801FBM S L89K
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Intel
Datasheet:
Part Number:
Description:
Microprocessor: Intel Celeron M Processor 320 and Ultra Low Voltage Intel Celeron M Processor at 600MHz
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 82550 Fast Ethernet Multifunction PCI/CardBus Controller
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 64 Mbit. Access speed 150 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 100 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
DA28F640J5A-1505 Volt Intel StrataFlash Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 6300ESB I/O Controller Hub
Manufacturer:
Intel Corporation
Datasheet: