NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 464
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
Lead Free Status / RoHS Status
Compliant
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SATA Controller Registers (D31:F2)
12.1.17
12.1.18
12.1.19
12.1.20
464
SID—Subsystem Identification Register (SATA–D31:F2)
Address Offset:
Default Value:
Lockable:
CAP—Capabilities Pointer Register (SATA–D31:F2)
Address Offset:
Default Value:
INT_LN—Interrupt Line Register (SATA–D31:F2)
Address Offset:
Default Value:
INT_PN—Interrupt Pin Register (SATA–D31:F2)
Address Offset:
Default Value:
15:0
Bit
Bit
7:0
Bit
7:0
Bit
7:0
Capabilities Pointer (CAP_PTR) — RO. This field indicates that the first capability pointer offset is
70h, the PCI Power Management capability.
Subsystem ID (SID) — R/WO. Value is written by BIOS. No hardware action taken on this value.
Interrupt Line — R/W. This field is used to communicate to software the interrupt line that the
interrupt pin is connected to.
Interrupt Pin — RO. This reflects the value of D31IP.SIP (Chipset Configuration Registers:Offset
3100h:bits 11:8).
2Eh
0000h
No
34h
70h
3Ch
00h
3Dh
See Register Description
–
2Fh
Intel
Description
Description
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Power Well: Core
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
RO
8 bits
R/WO
16 bits
R/W
8 bits
RO
8 bits
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